<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
<html xmlns="http://www.w3.org/1999/xhtml">
<head>
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
<meta http-equiv="X-UA-Compatible" content="IE=9"/>
<meta name="generator" content="Doxygen 1.8.5"/>
<title>qspipsu: xqspipsu_hw.c File Reference</title>
<link href="tabs.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="jquery.js"></script>
<script type="text/javascript" src="dynsections.js"></script>
<link href="navtree.css" rel="stylesheet" type="text/css"/>
<script type="text/javascript" src="resize.js"></script>
<script type="text/javascript" src="navtree.js"></script>
<script type="text/javascript">
  $(document).ready(initResizable);
  $(window).load(resizeHeight);
</script>
<link href="doxygen.css" rel="stylesheet" type="text/css" />
<link href="HTML_custom.css" rel="stylesheet" type="text/css"/>
</head>
<body>
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
<div id="titlearea">
<table cellspacing="0" cellpadding="0">
 <tbody>
 <tr style="height: 56px;">
  <td id="projectlogo"><img alt="Logo" src="xlogo_bg.png"/></td>
  <td style="padding-left: 0.5em;">
   <div id="projectname">qspipsu
   </div>
   <div id="projectbrief">Vitis Drivers API Documentation</div>
  </td>
 </tr>
 </tbody>
</table>
</div>
<!-- end header part -->
<!-- Generated by Doxygen 1.8.5 -->
  <div id="navrow1" class="tabs">
    <ul class="tablist">
      <li><a href="index.html"><span>Overview</span></a></li>
      <li><a href="annotated.html"><span>Data&#160;Structures</span></a></li>
      <li><a href="globals.html"><span>APIs</span></a></li>
      <li><a href="files.html"><span>File&#160;List</span></a></li>
      <li><a href="pages.html"><span>Examples</span></a></li>
    </ul>
  </div>
</div><!-- top -->
<div id="side-nav" class="ui-resizable side-nav-resizable">
  <div id="nav-tree">
    <div id="nav-tree-contents">
      <div id="nav-sync" class="sync"></div>
    </div>
  </div>
  <div id="splitbar" style="-moz-user-select:none;" 
       class="ui-resizable-handle">
  </div>
</div>
<script type="text/javascript">
$(document).ready(function(){initNavTree('xqspipsu__hw_8c.html','');});
</script>
<div id="doc-content">
<div class="header">
  <div class="summary">
<a href="#func-members">Functions</a>  </div>
  <div class="headertitle">
<div class="title">xqspipsu_hw.c File Reference</div>  </div>
</div><!--header-->
<div class="contents">
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:gaf5c0853d67052b9b05af03946e51c4c2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gaf5c0853d67052b9b05af03946e51c4c2">XQspiPsu_FillTxFifo</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg, u32 Size)</td></tr>
<tr class="memdesc:gaf5c0853d67052b9b05af03946e51c4c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fills the TX FIFO as long as there is room in the FIFO or the bytes required to be transmitted.  <a href="group__qspipsu__api.html#gaf5c0853d67052b9b05af03946e51c4c2">More...</a><br/></td></tr>
<tr class="separator:gaf5c0853d67052b9b05af03946e51c4c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga58406ccb7e182a93cd3a47c060de091e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga58406ccb7e182a93cd3a47c060de091e">XQspiPsu_TXSetup</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg)</td></tr>
<tr class="memdesc:ga58406ccb7e182a93cd3a47c060de091e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Checks the TX buffer in the message and setup the TX FIFO as required.  <a href="group__qspipsu__api.html#ga58406ccb7e182a93cd3a47c060de091e">More...</a><br/></td></tr>
<tr class="separator:ga58406ccb7e182a93cd3a47c060de091e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0467a9580fe9018adfd4302fbd91e404"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga0467a9580fe9018adfd4302fbd91e404">XQspiPsu_SetupRxDma</a> (const <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg)</td></tr>
<tr class="memdesc:ga0467a9580fe9018adfd4302fbd91e404"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets up the RX DMA operation.  <a href="group__qspipsu__api.html#ga0467a9580fe9018adfd4302fbd91e404">More...</a><br/></td></tr>
<tr class="separator:ga0467a9580fe9018adfd4302fbd91e404"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga03fb04c8187cf51d256a9196430c6224"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga03fb04c8187cf51d256a9196430c6224">XQspiPsu_Setup64BRxDma</a> (const <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg)</td></tr>
<tr class="memdesc:ga03fb04c8187cf51d256a9196430c6224"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets up the RX DMA operation on a 32-bit Machine For 64-bit DMA transfers.  <a href="group__qspipsu__api.html#ga03fb04c8187cf51d256a9196430c6224">More...</a><br/></td></tr>
<tr class="separator:ga03fb04c8187cf51d256a9196430c6224"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga02f2ea05785dff6887625c5ef088a73b"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga02f2ea05785dff6887625c5ef088a73b">XQspiPsu_SetIOMode</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg)</td></tr>
<tr class="memdesc:ga02f2ea05785dff6887625c5ef088a73b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reads remaining bytes after the completion of a DMA transfer using I/O mode.  <a href="group__qspipsu__api.html#ga02f2ea05785dff6887625c5ef088a73b">More...</a><br/></td></tr>
<tr class="separator:ga02f2ea05785dff6887625c5ef088a73b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad77b041e10c03756bd0e3c197a63a2e3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gad77b041e10c03756bd0e3c197a63a2e3">XQspiPsu_RXSetup</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg)</td></tr>
<tr class="memdesc:gad77b041e10c03756bd0e3c197a63a2e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Checks the RX buffers in the message and setup the RX DMA as required.  <a href="group__qspipsu__api.html#gad77b041e10c03756bd0e3c197a63a2e3">More...</a><br/></td></tr>
<tr class="separator:gad77b041e10c03756bd0e3c197a63a2e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8b201a022bb63afbaaf9afad23064761"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga8b201a022bb63afbaaf9afad23064761">XQspiPsu_TXRXSetup</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg, u32 *GenFifoEntry)</td></tr>
<tr class="memdesc:ga8b201a022bb63afbaaf9afad23064761"><td class="mdescLeft">&#160;</td><td class="mdescRight">Checks the TX/RX buffers in the message and setups up the GENFIFO entries, TX FIFO, or RX DMA as required.  <a href="group__qspipsu__api.html#ga8b201a022bb63afbaaf9afad23064761">More...</a><br/></td></tr>
<tr class="separator:ga8b201a022bb63afbaaf9afad23064761"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7fc4cdebc35bb7b5d3ca9128917c131c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga7fc4cdebc35bb7b5d3ca9128917c131c">XQspiPsu_GenFifoEntryDataLen</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg, u32 *GenFifoEntry)</td></tr>
<tr class="memdesc:ga7fc4cdebc35bb7b5d3ca9128917c131c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Writes the data length to GENFIFO entries to be transmitted or received.  <a href="group__qspipsu__api.html#ga7fc4cdebc35bb7b5d3ca9128917c131c">More...</a><br/></td></tr>
<tr class="separator:ga7fc4cdebc35bb7b5d3ca9128917c131c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6f3b7fc81ae5c50ee3ea373d80b4b542"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#ga6f3b7fc81ae5c50ee3ea373d80b4b542">XQspiPsu_CreatePollDataConfig</a> (const <a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, const <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *FlashMsg)</td></tr>
<tr class="memdesc:ga6f3b7fc81ae5c50ee3ea373d80b4b542"><td class="mdescLeft">&#160;</td><td class="mdescRight">Creates Poll configuration register data to write.  <a href="group__qspipsu__api.html#ga6f3b7fc81ae5c50ee3ea373d80b4b542">More...</a><br/></td></tr>
<tr class="separator:ga6f3b7fc81ae5c50ee3ea373d80b4b542"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae7bfe0aff5a064a01b0f822f46b26deb"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gae7bfe0aff5a064a01b0f822f46b26deb">XQspiPsu_SelectSpiMode</a> (u8 SpiMode)</td></tr>
<tr class="memdesc:gae7bfe0aff5a064a01b0f822f46b26deb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Selects SPI mode - x1 or x2 or x4.  <a href="group__qspipsu__api.html#gae7bfe0aff5a064a01b0f822f46b26deb">More...</a><br/></td></tr>
<tr class="separator:gae7bfe0aff5a064a01b0f822f46b26deb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae720bdee9a521b160e1e364053b66b61"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gae720bdee9a521b160e1e364053b66b61">XQspiPsu_SetDefaultConfig</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr)</td></tr>
<tr class="memdesc:gae720bdee9a521b160e1e364053b66b61"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables and initializes DMA Mode, set little endain, disable poll timeout, clears prescalar bits and reset thresholds.  <a href="group__qspipsu__api.html#gae720bdee9a521b160e1e364053b66b61">More...</a><br/></td></tr>
<tr class="separator:gae720bdee9a521b160e1e364053b66b61"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa04d433c594d66417be2c4f83c092203"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gaa04d433c594d66417be2c4f83c092203">XQspiPsu_ReadRxFifo</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg, s32 Size)</td></tr>
<tr class="memdesc:gaa04d433c594d66417be2c4f83c092203"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reads the specified number of bytes from RX FIFO.  <a href="group__qspipsu__api.html#gaa04d433c594d66417be2c4f83c092203">More...</a><br/></td></tr>
<tr class="separator:gaa04d433c594d66417be2c4f83c092203"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae7900ea73e245de8f091d4d4c201fe76"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__qspipsu__api.html#gae7900ea73e245de8f091d4d4c201fe76">XQspiPsu_IORead</a> (<a class="el" href="struct_x_qspi_psu.html">XQspiPsu</a> *InstancePtr, <a class="el" href="struct_x_qspi_psu___msg.html">XQspiPsu_Msg</a> *Msg, u32 StatusReg)</td></tr>
<tr class="memdesc:gae7900ea73e245de8f091d4d4c201fe76"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reads data from RXFifo in I/O mode.  <a href="group__qspipsu__api.html#gae7900ea73e245de8f091d4d4c201fe76">More...</a><br/></td></tr>
<tr class="separator:gae7900ea73e245de8f091d4d4c201fe76"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
</div><!-- contents -->
</div><!-- doc-content -->
<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
	<p class="footer">&copy; Copyright 2015-2022 Xilinx, Inc. All Rights Reserved.</p>
	<p class="footer">&copy; Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.</p>
</div>
</body>
</html>
